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INTEGRATED CIRCUITS
DATA SHEET
TDA9962 12-bit, 3.0 V, 20 Msps analog-to-digital interface for CCD cameras
Objective specification File under Integrated Circuits, IC02 2000 May 01
Philips Semiconductors
Objective specification
12-bit, 3.0 V, 20 Msps analog-to-digital interface for CCD cameras
FEATURES * Correlated Double Sampling (CDS), Programmable Gain Amplifier (PGA), 12-bit Analog-to-Digital Converter (ADC) and reference regulator included * Fully programmable via a 3-wire serial interface * Sampling frequency up to 20 MHz * PGA gain range of 24 dB (in steps of 0.1 dB) * Low power consumption of only 140 mW at 2.7 V * Power consumption in standby mode of 4.5 mW (typ.) * 3.0 V operation and 2.2 to 3.6 V operation for the digital outputs * All digital inputs accept 5 V signals * Active control pulses polarity selectable via serial interface * 8-bit DAC included for analog settings * TTL compatible inputs, CMOS compatible outputs. ORDERING INFORMATION TYPE NUMBER TDA9962HL PACKAGE NAME LQFP48 DESCRIPTION plastic low profile quad flat package; 48 leads; body 7 x 7 x 1.4 mm APPLICATIONS
TDA9962
* Low-power, low-voltage CCD camera systems. GENERAL DESCRIPTION The TDA9962 is a 12-bit analog-to-digital interface for CCD cameras. The device includes a correlated double sampling circuit, PGA, clamp loops and a low-power 12-bit ADC together with its reference voltage regulator. The PGA gain and the ADC input clamp level are controlled via the serial interface. An additional DAC is provided for additional system controls; its output voltage range is 1.0 V (p-p) which is available at pin OFDOUT.
VERSION SOT313-2
2000 May 01
2
Philips Semiconductors
Objective specification
12-bit, 3.0 V, 20 Msps analog-to-digital interface for CCD cameras
QUICK REFERENCE DATA SYMBOL VCCA VCCD VCCO ICCA ICCD ICCO ADCres Vi(CDS)(p-p) fpix(max) fpix(min) DRPGA Ntot(rms) Ein(rms) Ptot PARAMETER analog supply voltage digital supply voltage digital outputs supply voltage analog supply current digital supply current digital outputs supply current ADC resolution maximum CDS input voltage (peak-to-peak value) maximum pixel rate minimum pixel rate PGA dynamic range total noise from CDS input to ADC output equivalent input noise (RMS value) total power consumption PGA gain = 0 dB; see Fig.8 gain = 24 dB VCCA = VCCD = VCCO = 3 V VCCA = VCCD = VCCO = 2.7 V VCC = 2.85 V VCC 3.0 V fpix = 20 MHz; CL = 20 pF; input ramp response time is 800 s all clamps active CONDITIONS MIN. 2.7 2.7 2.2 - - - - 650 800 20 tbf - - - - - TYP. 3.0 3.0 2.5 49 2 1 12 - - - - 24 1.2 95 155 140
TDA9962
MAX. 3.6 3.6 3.6 - - - - - - - - - - - - -
UNIT V V V mA mA mA bits mV mV MHz MHz dB LSB V mW mW
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SHP 45 SHD 46 VCCA1 1 AGND1 2 VCCA4 41 AGND6 CLPOB CLPDM 40 44 48 BLK CLK OE 43 47 39 22 21 CDS CLOCK GENERATOR 37 38 36 CLAMP CPCDS2 VCCA2 AGND2 IN 9 7 3 4 CORRELATED DOUBLE SAMPLING PGA SHIFT
BLACK LEVEL SHIFT
BLOCK DIAGRAM
Philips Semiconductors
12-bit, 3.0 V, 20 Msps analog-to-digital interface for CCD cameras
DGND1 VCCD1 OGND2 VCCO2 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 OGND1 VCCO1 DCLPC
CPCDS1
8
35 34 33 32 DATA FLIPFLOP 31 OUTPUT BUFFER 30 29 28 27 26 25 8-BIT REGISTER
BLANKING 12-bit ADC
handbook, full pagewidth
4
VCCA3 AGND3 14 5 OFDOUT 11 12 TEST
CLAMP
Vref
TDA9962
7-BIT REGISTER
24 23
OFD DAC
8-BIT REGISTER
SERIAL INTERFACE
REGULATOR
10
6
13
15
16
19
18
17
20
42
FCE504
AGND4
AGND5
OPGA
OPGAC
SEN
SCLK SDATA VSYNC
STDBY
Objective specification
TDA9962
Fig.1 Block diagram.
Philips Semiconductors
Objective specification
12-bit, 3.0 V, 20 Msps analog-to-digital interface for CCD cameras
PINNING SYMBOL VCCA1 AGND1 AGND2 IN AGND3 AGND4 VCCA2 CPCDS1 CPCDS2 DCLPC OFDOUT TEST AGND5 VCCA3 OPGA OPGAC SDATA SCLK SEN VSYNC VCCD1 DGND1 VCCO1 OGND1 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 OGND2 VCCO2 OE AGND6 2000 May 01 PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 analog supply voltage 1 analog ground 1 analog ground 2 input signal from CCD analog ground 3 analog ground 4 analog supply voltage 2 clamp storage capacitor pin 1 clamp storage capacitor pin 2 regulator decoupling pin analog output of the additional 8-bit control DAC test mode input pin (should be connected to AGND5) analog ground 5 analog supply voltage 3 PGA output (test pin) PGA complementary output (test pin) serial data input for serial interface control serial clock input for serial interface strobe pin for serial interface vertical sync pulse input digital supply voltage 1 digital ground 1 digital outputs supply voltage 1 digital output ground 1 ADC digital output 0 (LSB) ADC digital output 1 ADC digital output 2 ADC digital output 3 ADC digital output 4 ADC digital output 5 ADC digital output 6 ADC digital output 7 ADC digital output 8 ADC digital output 9 ADC digital output 10 ADC digital output 11 (MSB) digital output ground 2 digital outputs supply voltage 2 DESCRIPTION
TDA9962
output enable control input (LOW = outputs active; HIGH = outputs in high-impedance) analog ground 6 5
Philips Semiconductors
Objective specification
12-bit, 3.0 V, 20 Msps analog-to-digital interface for CCD cameras
SYMBOL VCCA4 STDBY BLK CLPOB SHP SHD CLK CLPDM PIN 41 42 43 44 45 46 47 48 analog supply voltage 4 DESCRIPTION
TDA9962
standby mode control input (LOW = TDA9962 active; HIGH = TDA9962 standby) blanking control input clamp pulse input at optical black preset sample-and-hold pulse input data sample-and-hold pulse input data clock input clamp pulse input at dummy pixel
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VCCA1 1 AGND1 2 AGND2 3 IN 4 AGND3 5 AGND4 6 VCCA2 7 CPCDS1 8 CPCDS2 9 DCPLC 10 OFD 11 TEST 12
37 OGND2
48 CLPDM
38 VCCO2
44 CLPOB
40 AGND6
42 STDBY
41 VCCA4
46 SHD
45 SHP
47 CLK
43 BLK
39 OE
36 D11 35 D10 34 D9 33 D8 32 D7
TDA9962HL
31 D6 30 D5 29 D4 28 D3 27 D2 26 D1 25 D0
AGND5 13
OPGAC 16
VSYNC 20
VCCD1 21
VCCA3 14
OPGA 15
SDATA 17
SCLK 18
SEN 19
DGND1 22
VCCO1 23
OGND1 24
FCE505
Fig.2 Pin configuration.
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Philips Semiconductors
Objective specification
12-bit, 3.0 V, 20 Msps analog-to-digital interface for CCD cameras
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). SYMBOL VCCA VCCD VCCO VCC PARAMETER analog supply voltage digital supply voltage digital outputs supply voltage supply voltage difference between VCCA and VCCD between VCCA and VCCO between VCCD and VCCO Vi Io Tstg Tamb Tj Note input voltage data output current storage temperature ambient temperature junction temperature referenced to AGND -0.5 -0.5 -0.5 -0.3 - -55 -20 - CONDITIONS note 1 note 1 note 1 MIN. -0.3 -0.3 -0.3
TDA9962
MAX. +7.0 +7.0 +7.0 +0.5 +1.2 +1.2 +7.0 10 +150 +75 +150
UNIT V V V V V V V mA C C C
1. The supply voltages VCCA, VCCD and VCCO may have any value between -0.3 and +7.0 V provided that the supply voltage difference VCC remains as indicated. HANDLING Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is desirable to take normal precautions appropriate to handling integrated circuits. THERMAL CHARACTERISTICS SYMBOL Rth(j-a) PARAMETER thermal resistance from junction to ambient CONDITIONS in free air VALUE 76 UNIT K/W
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Philips Semiconductors
Objective specification
12-bit, 3.0 V, 20 Msps analog-to-digital interface for CCD cameras
CHARACTERISTICS VCCA = VCCD = 3.0 V; VCCO = 2.5 V; fpix = 20 MHz; Tamb = 25 C; unless otherwise specified. SYMBOL Supplies VCCA VCCD VCCO ICCA ICCD ICCO analog supply voltage digital supply voltage digital outputs supply voltage analog supply current digital supply current digital outputs supply current CL = 20 pF on all data outputs; input ramp response time is 800 s all clamps active 2.7 2.7 2.2 - - - 3.0 3.0 2.5 49 2 1 PARAMETER CONDITIONS MIN. TYP.
TDA9962
MAX.
UNIT
3.6 3.6 3.6 - - -
V V V mA mA mA
Digital inputs PINS SHP, SHD AND CLK (REFERENCED TO DGND) VIL VIH Ii Zi Ci VIL VIH Ii Clamps GLOBAL CHARACTERISTICS OF THE CLAMP LOOPS tW(clamp) clamp active pulse width in number of pixels PGA code = 255 for maximum 4 LSB error 12 - - pixels LOW-level input voltage HIGH-level input voltage input current input impedance input capacitance 0 Vi 5.5 V fCLK = 20 MHz fCLK = 20 MHz 0 2.2 -3 - - 0 2.2 0 Vi 5.5 V -2 - - - 50 - - - - 0.6 5.5 +3 - 2 V V A k pF
PINS CLPDM, CLPOB, SEN, SCLK, SDATA, STBY, OE, BLK AND VSYNC LOW-level input voltage HIGH-level input voltage input current 0.6 5.5 +2 V V A
INPUT CLAMP (DRIVEN BY CLPDM) gm(CDS) CDS input clamp transconductance - 20 - mS
Correlated Double Sampling (CDS) Vi(CDS)(p-p) maximum peak-to-peak CDS input amplitude (video signal) maximum CDS input reset pulse amplitude input current into pin IN input capacitance CDS control pulses minimum active time at floating gate level VCC = 2.85 V VCC 3.0 V 650 800 500 tbf - Vi(CDS)(p-p) = 800 mV 11 black-to-white transition in 1 pixel with 99% Vi recovery 8 - - - - 2 15 - - - tbf - - mV mV mV A pF ns
Vreset(max) Ii(IN) Ci tCDS(min)
2000 May 01
Philips Semiconductors
Objective specification
12-bit, 3.0 V, 20 Msps analog-to-digital interface for CCD cameras
SYMBOL th(IN;SHP) PARAMETER CDS input hold time (pin IN) compared to control pulse SHP CDS input hold time (pin IN) compared to control pulse SHD CONDITIONS VCCA = VCCD = 3.0 V; Tamb = 25 C; see Figs 3 and 4 VCCA = VCCD = 3.0 V; Tamb = 25 C; see Figs 3 and 4 - MIN. 1 TYP.
TDA9962
MAX. 2
UNIT ns
th(IN;SHD)
-
1
2
ns
Amplifier DRPGA GPGA DNL PGA dynamic range PGA gain step - 0.08 - 20 tbf 15 15 see Figs 3 and 4 see Figs 3 and 4 10 5 800 50 - - - - -100 24 0.10 0.5 - - - - - - - - 1.2 2.0 95 135 - - 0.12 0.9 - - - - - - - - - - - - +100 dB dB
Analog-to-Digital Converter (ADC) differential non linearity fpix = 20 MHz; ramp input LSB
Total chain characteristics (CDS + PGA + ADC) fpix(max) fpix(min) tCLKH tCLKL td(SHD;CLK) tsu(BLK;SHD) Vi(IN)(FS) Ntot(rms) maximum pixel frequency minimum pixel frequency CLK pulse width HIGH CLK pulse width LOW time delay between SHD and CLK set-up time of BLK compared to SHD MHz MHz ns ns ns ns mV mV LSB LSB V V mV
video input dynamic signal PGA code = 00 for ADC full-scale output PGA code = 255 total noise from CDS input see Fig.8 to ADC output PGA gain = 0 dB (RMS value) PGA gain = 9 dB equivalent input noise voltage (RMS value) maximum offset between CCD floating level and CCD dark pixel level PGA gain = 24 dB PGA gain = 9 dB
Ein(rms) OCCD(max)
Digital-to-analog converter (OFDOUT DAC) VOFDOUT(p-p) additional 8-bit control Ri = 1 M DAC (OFD) output voltage (peak-to-peak value) VOFDOUT(0) DC output voltage for code 0 - 1.0 - V
- - - - static -
AGND
-
V V ppm/C A
VOFDOUT(255) DC output voltage for code 255 TCDAC ZOFDOUT IOFDOUT DAC output range temperature coefficient DAC output impedance OFD output current drive
AGND + 1.0 - 250 2000 - - - 100
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Philips Semiconductors
Objective specification
12-bit, 3.0 V, 20 Msps analog-to-digital interface for CCD cameras
SYMBOL PARAMETER CONDITIONS IOH = -1 mA IOL = 1 mA 0.5 V < Vo < VCCO MIN. VCCO - 0.5 0 -20 5 CL = 10 pF; VCCO = 3.0 V CL = 10 pF; VCCO = 2.7 V CL = 10 pF; VCCO = 2.2 V CL fSCLK(max) output load capacitance Serial interface maximum frequency of serial clock interface 10 - - - - - - - - - 16 18 tbf - TYP.
TDA9962
MAX.
UNIT
Digital outputs (fpix = 20 MHz; CL = 10 pF); see Figs 3 and 4 VOH VOL IOZ th(o) td(o) HIGH-level output voltage LOW-level output voltage output current in 3-state mode output hold time output delay time VCCO 0.5 +20 - tbf tbf tbf 20 - V V A ns ns ns ns pF
MHz
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IN N N+1 tCDS(min) 2.2 V SHP 0.6 V th(IN;SHP) N+2 N+3 N+4 N+5 tCDS(min) 2.2 V SHD 0.6 V th(IN;SHD) tCLKH 2.2 V CLK 0.6 V td(SHD;CLK) ADC CLAMP CODE 2.2 V 0.6 V 0.6 V 2.2 V
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Philips Semiconductors
12-bit, 3.0 V, 20 Msps analog-to-digital interface for CCD cameras
11
DATA BLK
N-4
N-3
50%
N-2
N-1
N
th(o) td(o) 2.2 V
FCE506
Objective specification
tsu(BLK;SHD)
TDA9962
Fig.3 Pixel frequency timing diagram; all polarities active HIGH.
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IN N N+1 N+2 N+3 N+4 N+5 2.2 V SHP 0.6 V th(IN;SHP) 2.2 V SHD 0.6 V th(IN;SHD) tCDS(min) t CDS(min) 2.2 V 0.6 V
handbook, full pagewidth
Philips Semiconductors
12-bit, 3.0 V, 20 Msps analog-to-digital interface for CCD cameras
12
CLK 0.6 V tCLKL DATA N-4 BLK
2.2 V
2.2 V 0.6 V td(SHD;CLK) ADC CLAMP CODE
N-3
50%
N-2
N-1
N
th(o) td(o) 0.6 V
Objective specification
tsu(BLK;SHD)
FCE507
TDA9962
Fig.4 Pixel frequency timing diagram; all polarities active LOW.
Philips Semiconductors
Objective specification
12-bit, 3.0 V, 20 Msps analog-to-digital interface for CCD cameras
TDA9962
handbook, full pagewidth
FCE508
1.0 OFDOUT DAC voltage output (V)
0 0 OFDOUT control DAC input code 255
Fig.5 DAC voltage output as a function of DAC input code.
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CLPOB WINDOW AGCOUT VIDEO OPTICAL BLACK HORIZONTAL FLYBACK
CLPDM WINDOW DUMMY VIDEO
CLPOB (active HIGH)
CLPDM (active HIGH)
BLK (active HIGH)
BLK window
FCE509
Fig.6 Line frequency timing diagram.
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Philips Semiconductors
Objective specification
12-bit, 3.0 V, 20 Msps analog-to-digital interface for CCD cameras
TDA9962
handbook, halfpage
25.9
30 TOTAL gain (dB) 24
FCE510
18
12
6
1.9
0
0
64
128
255 192 PGA input code
Fig.7 Total gain from CDS input to ADC input as a function of PGA input code.
handbook, halfpage N
8 tot(rms) (LSB) 7 6
FCE511
5 4 3 2 1 0
0
64
128
192 256 PGA code
Noise measurement at ADC outputs: Coupling capacitor at input is grounded, so only noise contribution of the front-end is evaluated. Front-end works at 20 Mpixels with line of 1024 pixels whose first 40 are used to run CLPOB and the last 40 for CLPDM. Data at the ADC outputs are measured during the other pixels. As a result of this, the standard deviation of the codes statistic is computed, resulting in the noise. No quantization noise is taken into account.
Fig.8 Typical total noise performance as a function of PGA gain.
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Philips Semiconductors
Objective specification
12-bit, 3.0 V, 20 Msps analog-to-digital interface for CCD cameras
TDA9962
SDATA handbook, full pagewidth SD0 SCLK LSB 12 SEN SD1 SD2 SD3 SD4
SHIFT REGISTER SD5 SD6 SD7 SD8 SD9 SD10 SD11 MSB LATCH SELECTION A0 A1 A2 A3
8 OFDOUT DAC LATCHES
10 PGA GAIN LATCHES
5 ADC CLAMP LATCHES
9 CONTROL PULSE POLARITY LATCHES
SCLK
VSYNC
FLIP-FLOP
FLIP-FLOP
FLIP-FLOP
FCE512
8-bit DAC
PGA control
ADC clamp control
control pulses polarity settings
Fig.9 Serial interface block diagram.
handbook, full pagewidth
tsu2 MSB thd4 SD8 SD7 SD6 SD5 SD4 SD3 SD2 SD1 LSB SD0
SDATA
A3
A2
A1
A0
SD11 SD10 SD9
SCLK
SEN tsu1 tsu3 thd3
FCE513
tsu1 = tsu2 = tsu3 = 10 ns (min.); thd3 = thd4 = 10 ns (min.).
Fig.10 Loading sequence of control input data via the serial interface.
2000 May 01
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Philips Semiconductors
Objective specification
12-bit, 3.0 V, 20 Msps analog-to-digital interface for CCD cameras
Table 1 Serial interface programming DATA BITS SD11 TO SD0 A3 0 0 0 0 0 1 A2 0 0 0 0 1 1 A1 0 0 1 1 0 1 A0 0 1 0 1 0 1 PGA gain control (SD7 to SD0) DAC OFDOUT output control (SD7 to SD0) ADC clamp reference control (SD6 to SD0); from code 0 to 127
TDA9962
ADDRESS BITS
control pulses (pins SHP, SHD, CLPDM, CLPOB, BLK and CLK) polarity settings; SD2, SD6, SD7 and SD9 should be set to logic 1; for SD6 and SD7 see Tables 3, 4, 5 and 6 SD7 = 0 by default; SD7 = 1 PGA gain up to 36 dB but noise and clamp behaviour are not guaranteed initialization (SD8 = 1; SD11 to SD9 = 0 and SD7 to SD0 = 0) test modes
other addresses Table 2 Polarity settings SYMBOL SHP and SHD CLK CLPDM CLPOB BLK VSYNC Table 3
PIN 45 and 46 47 48 44 43 20
SERIAL CONTROL BIT SD4 SD5 SD0 SD1 SD3 SD8
ACTIVE EDGE OR LEVEL 1 = HIGH; 0 = LOW 1 = rising; 0 = falling 1 = HIGH; 0 = LOW 1 = HIGH; 0 = LOW 1 = HIGH; 0 = LOW 0 = rising; 1 = falling
Standby control using pin STDBY STDBY 1 0 0 1 0 ADC DIGITAL OUTPUTS SD11 TO SD0 last logic state active active test logic state ICCA + ICCO + ICCD (typ.) 1.5 mA 51 mA 51 mA 1.5 mA
BIT SD7 OF REGISTER 0011 1
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Philips Semiconductors
Objective specification
12-bit, 3.0 V, 20 Msps analog-to-digital interface for CCD cameras
Table 4 Output enable selection using output enable pin (OE) OE 0 1 0 0 1 Table 5 SD7 0 1 Table 6
TDA9962
BIT SD6 OF REGISTER 0011 1
ADC DIGITAL OUTPUTS SD9 TO SD0 active, binary high-impedance high-impedance active binary
Standby control by serial interface (register address A3 = 0, A2 = 0, A1 = 1, A0 = 1); pin STDBY connected to ground ADC DIGITAL OUTPUTS SD9 TO SD0 last logic state active ICCA + ICCO + ICCD (typ.) 1.5 mA 72 mA
Output enable control by serial interface (register address A3 = 0, A2 = 0, A1 = 1, A0 = 1); output enable pin (OE) connected to ground SD6 0 1 ADC DIGITAL OUTPUTS SD9 TO SD0 high-impedance active binary
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Philips Semiconductors
Objective specification
12-bit, 3.0 V, 20 Msps analog-to-digital interface for CCD cameras
APPLICATION INFORMATION
TDA9962
ndbook, full pagewidth
VCCD
VCCD
VCCA
VCCO
100 nF
(2) (2)
100 nF
CLPDM
CLPOB
1 F VCCA VCCA1 AGND1 AGND2 IN AGND3 AGND4 VCCA 100 nF 1 F 1 F 1 F VCCA2 CPCDS1 CPCDS2 DCPLC OFD TEST
48 47 46 45 44 43 42 41 40 39 38 37 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 AGND5 OPGAC VCCA3 OPGA 17 18 19 20 21 22 23 VCCD1 VCCO1 VSYNC DGND1 SCLK SDATA SEN 24 OGND1 36 35 34 33 32 31 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
TDA9962
30 29 28 27 26 25
100 nF VCCA serial interface
(1)
100 nF VCCD
100 nF
FCE514
VCCO
(1) Pins SEN and VSYNC should be interconnected when vertical sync signal is not available. (2) Input signals IN, SHD and SHP must be adjusted to comply with timing signals th(IN;SHP) and th(IN;SHD) (see Chapter "Characteristics").
Fig.11 Application diagram.
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OGND2
AGND6
VCCA4
SHP
CLK
VCCO2
SHD
STDBY
CCD(2)
BLK
OE
Philips Semiconductors
Objective specification
12-bit, 3.0 V, 20 Msps analog-to-digital interface for CCD cameras
Power and grounding recommendations When designing a printed-circuit board for applications such as PC cameras, surveillance cameras, camcorders and digital still cameras, care should be taken to minimize the noise. For the front-end integrated circuit, the basic rules of printed-circuit board design and implementation of analog components (such as classical operational amplifiers) must be respected, particularly with respect to power and ground connections. The following additional recommendation is given for the CDS input pin(s) which is/are internally connected to the programmable gain amplifier. The connections between the CCD interface and the CDS input should be as short as possible and a ground ring protection around these connections can be beneficial. Separate analog and digital supplies provide the best solution. If it is not possible to do this on the board then the analog supply pins must be decoupled effectively from the digital supply pins. If the same power supply and ground are used for all the pins then the decoupling capacitors must be placed as close as possible to the IC package.
TDA9962
In a two-ground system, in order to minimize the noise through package and die parasitics, the following recommendation must be implemented. All the analog and digital supply pins must be decoupled to the analog ground plane. Only the ground pin associated with the digital outputs must be connected to the digital ground plane. All the other ground pins should be connected to the analog ground plane. The analog and digital ground planes must be connected together at one point as close as possible to the ground pin associated with the digital outputs. The digital output pins and their associated lines should be shielded by the digital ground plane which can then be used as a return path for digital signals.
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Philips Semiconductors
Objective specification
12-bit, 3.0 V, 20 Msps analog-to-digital interface for CCD cameras
PACKAGE OUTLINE LQFP48: plastic low profile quad flat package; 48 leads; body 7 x 7 x 1.4 mm
TDA9962
SOT313-2
c
y X
36 37
25 24 ZE
A
e
E HE
A A2
A1
(A 3) Lp L detail X
wM pin 1 index 48 1 12 ZD bp D HD wM B vM B vM A 13 bp
e
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT313-2 REFERENCES IEC 136E05 JEDEC MS-026 EIAJ EUROPEAN PROJECTION A max. 1.60 A1 0.20 0.05 A2 1.45 1.35 A3 0.25 bp 0.27 0.17 c 0.18 0.12 D (1) 7.1 6.9 E (1) 7.1 6.9 e 0.5 HD 9.15 8.85 HE 9.15 8.85 L 1.0 Lp 0.75 0.45 v 0.2 w 0.12 y 0.1 Z D (1) Z E (1) 0.95 0.55 0.95 0.55 7 0o
o
ISSUE DATE 99-12-27 00-01-19
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Philips Semiconductors
Objective specification
12-bit, 3.0 V, 20 Msps analog-to-digital interface for CCD cameras
SOLDERING Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (document order number 9398 652 90011). There is no soldering method that is ideal for all surface mount IC packages. Wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used. Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 250 C. The top-surface temperature of the packages should preferable be kept below 230 C. Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results:
TDA9962
* Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. * For packages with leads on two sides and a pitch (e): - larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; - smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. * For packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Manual soldering Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
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Philips Semiconductors
Objective specification
12-bit, 3.0 V, 20 Msps analog-to-digital interface for CCD cameras
Suitability of surface mount IC packages for wave and reflow soldering methods
TDA9962
SOLDERING METHOD PACKAGE WAVE BGA, LFBGA, SQFP, TFBGA HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS PLCC(3), SO, SOJ LQFP, QFP, TQFP SSOP, TSSOP, VSO Notes 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the "Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods". 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. not suitable not not not suitable(2) recommended(3)(4) recommended(5) suitable REFLOW(1) suitable suitable suitable suitable suitable
2000 May 01
22
Philips Semiconductors
Objective specification
12-bit, 3.0 V, 20 Msps analog-to-digital interface for CCD cameras
DATA SHEET STATUS DATA SHEET STATUS Objective specification PRODUCT STATUS Development DEFINITIONS (1)
TDA9962
This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
Preliminary specification
Qualification
Product specification
Production
Note 1. Please consult the most recently issued data sheet before initiating or completing a design. DEFINITIONS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. DISCLAIMERS Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
2000 May 01
23
Philips Semiconductors - a worldwide company
Argentina: see South America Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140, Tel. +61 2 9704 8141, Fax. +61 2 9704 8139 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 1 60 101 1248, Fax. +43 1 60 101 1210 Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6, 220050 MINSK, Tel. +375 172 20 0733, Fax. +375 172 20 0773 Belgium: see The Netherlands Brazil: see South America Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor, 51 James Bourchier Blvd., 1407 SOFIA, Tel. +359 2 68 9211, Fax. +359 2 68 9102 Canada: PHILIPS SEMICONDUCTORS/COMPONENTS, Tel. +1 800 234 7381, Fax. +1 800 943 0087 China/Hong Kong: 501 Hong Kong Industrial Technology Centre, 72 Tat Chee Avenue, Kowloon Tong, HONG KONG, Tel. +852 2319 7888, Fax. +852 2319 7700 Colombia: see South America Czech Republic: see Austria Denmark: Sydhavnsgade 23, 1780 COPENHAGEN V, Tel. +45 33 29 3333, Fax. +45 33 29 3905 Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. +358 9 615 800, Fax. +358 9 6158 0920 France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex, Tel. +33 1 4099 6161, Fax. +33 1 4099 6427 Germany: Hammerbrookstrae 69, D-20097 HAMBURG, Tel. +49 40 2353 60, Fax. +49 40 2353 6300 Hungary: see Austria India: Philips INDIA Ltd, Band Box Building, 2nd floor, 254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025, Tel. +91 22 493 8541, Fax. +91 22 493 0966 Indonesia: PT Philips Development Corporation, Semiconductors Division, Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510, Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080 Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. +353 1 7640 000, Fax. +353 1 7640 200 Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053, TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007 Italy: PHILIPS SEMICONDUCTORS, Via Casati, 23 - 20052 MONZA (MI), Tel. +39 039 203 6838, Fax +39 039 203 6800 Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5057 Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. +82 2 709 1412, Fax. +82 2 709 1415 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. +60 3 750 5214, Fax. +60 3 757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905, Tel. +9-5 800 234 7381, Fax +9-5 800 943 0087 Middle East: see Italy Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB, Tel. +31 40 27 82785, Fax. +31 40 27 88399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. +64 9 849 4160, Fax. +64 9 849 7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. +47 22 74 8000, Fax. +47 22 74 8341 Pakistan: see Singapore Philippines: Philips Semiconductors Philippines Inc., 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474 Poland: Al.Jerozolimskie 195 B, 02-222 WARSAW, Tel. +48 22 5710 000, Fax. +48 22 5710 001 Portugal: see Spain Romania: see Italy Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW, Tel. +7 095 755 6918, Fax. +7 095 755 6919 Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762, Tel. +65 350 2538, Fax. +65 251 6500 Slovakia: see Austria Slovenia: see Italy South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 58088 Newville 2114, Tel. +27 11 471 5401, Fax. +27 11 471 5398 South America: Al. Vicente Pinzon, 173, 6th floor, 04547-130 SAO PAULO, SP, Brazil, Tel. +55 11 821 2333, Fax. +55 11 821 2382 Spain: Balmes 22, 08007 BARCELONA, Tel. +34 93 301 6312, Fax. +34 93 301 4107 Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM, Tel. +46 8 5985 2000, Fax. +46 8 5985 2745 Switzerland: Allmendstrasse 140, CH-8027 ZURICH, Tel. +41 1 488 2741 Fax. +41 1 488 3263 Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1, TAIPEI, Taiwan Tel. +886 2 2134 2886, Fax. +886 2 2134 2874 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260, Tel. +66 2 745 4090, Fax. +66 2 398 0793 Turkey: Yukari Dudullu, Org. San. Blg., 2.Cad. Nr. 28 81260 Umraniye, ISTANBUL, Tel. +90 216 522 1500, Fax. +90 216 522 1813 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 208 730 5000, Fax. +44 208 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381, Fax. +1 800 943 0087 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 3341 299, Fax.+381 11 3342 553
For all other countries apply to: Philips Semiconductors, International Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 2000
Internet: http://www.semiconductors.philips.com
SCA 69
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
753504/01/pp24
Date of release: 2000
May 01
Document order number:
9397 750 06915

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